This invention relates to a technique for achieving low temperature (for example, &lt;600.degree. C.) gettering of contaminants in integrated device structures, these structures including but not limited to, silicon-based multi-level metal layer devices, high-speed III-V devices, and integrated optic devices.
As the complexity of various integrated structures increases, it has become difficult, if not impossible, to utilize the conventional high temperature gettering techniques well-known in the art, one exemplary technique being disclosed in U.S. Pat. No. 3,632,438 issued to H. G. C. Richardson et al on Jan. 4, 1972.
In the realm of silicon integrated circuit technology, for example, multi-level metallization schemes are becoming more prevalent. This places an upper limit on the processing temperatures used after the formation of the first metal layer. Due to the problems of Hillock formation and contact resistance, the highest processing temperature subsequent to the formation of this first metallization cannot exceed 400.degree. C. The dielectric isolation between this first metal layer and subsequent metal layers if deposited at temperatures consistent with this upper limit. However, there is not conventional technique for gettering impurities present in this layer at or below this temperature limit of 400.degree. C.
Galium arsenide (GaAs) wafers grown by liquid phase epitaxy (LPE) processes exhibit poor intrinsic properties such as uniformity, purity and electron mobility. These wafers cannot withstand the high temperatures associated with conventional silicon gettering. Therefore, extrinsic gettering techniques (external mechanical damaging techniques) have been utilized to improve the device properties. One such exemplary prior art extrinsic gettering method for GaAs is disclosed in U.S. Pat. No. 4,525,239 issued to F-C Wang on June 25, 1985. Although the disclosed method is capable of gettering the impurities, an intrinsic method of accomplishing the same result would be preferable, since the process of mechanically damaging wafers must be well-controlled and is inherently timeconsuming.
In the rapidly maturing field of optical communications, integrated optical devices such as switches, beam splitters, couplers, etc., are finding increasing importance. These devices usually comprise a number of common components-an optically anisotropic crystal substrate (lithium niobate or lithium tantalate being common choices), waveguiding structures diffused into the surface of the substrate (titanium or tantalum metals, for example) and electrodes disposed over the surface of the substrate above the waveguides. A dielectric layer is used to insulate the substrate from the electrodes.
FIG. 1, which illustrates in cross-section a conventional prior art optical switch 10, is representative of the type of device structure described above. Switch 10 comprises an LiNbO.sub.3 substrate 12 and a pair of titanium (Ti) waveguides 14,16 diffused into top major surface 18 of substrate 12. A dielectric layer 20 is disposed to cover top major surface 18, where layer 20 may comprise SiO.sub.2. A pair of electrodes, 22,24 formed of aluminum, for example, are deposited to cover waveguides 14,16. In operation of switch 10, an optical signal I passing through the waveguides travels in the direction indicated in FIG. 1. It is well known that this optical signal may be "switched" from one waveguide to another by the application of an external voltage, since the voltage will result in the formation of an electric field in the waveguides and substrate, this electric field thus modifying the respective refractive indices of these regions. For example, an applied voltage 26 of given magnitude V will cause optical signal I traveling through waveguide 14 to "switch" to waveguide 16.
A problem with these prior art integrated optic devices is that they are subject to ionic drift which is capable of degrading the device performance. Ionic drift is a time-dependent phenomenon which results in the creation of an electric field E.sub.ionic which opposes the electric field E.sub.applied induced by the applied voltage. This is illustrated by the build-up of positive charge 28 under electrode 24 in FIG. 1. In conventional LiNbO.sub.3 or LiTaO.sub.3 devices, these positive charges are mobile Li ions from substrate 12 which travel along the electric filed lines as shown. In general, these ions may be classified as alkali ions and include, among others, lithium, sodium, and potassium. To maintain the same state in switch 10 in the presence of E.sub.ionic, therefore, an ever-increasing voltage is required to be applied between electrodes 22 and 24. Without some means of removing ionic charges 28, therefore, device performance limitations will be exceeded and the switch will fail.
In summary, therefore, a great need exists in the prior art for an intrinsic gettering technique which is functional at the relatively low temperature processing limits of many state-of-the-art devices.